1. Field of the Invention
The present invention relates to a receiving apparatus and a receiving method and, more particularly, to a receiving apparatus and a receiving method based on an OFDM method.
2. Description of the Related Art
Modulation methods called orthogonal frequency division multiplexing (OFDM) have recently been proposed as a method for transmitting a digital signal. In an OFDM method, a number of subcarriers orthogonal to each other are provided in a transmission band, data items are respectively assigned to the amplitudes and phases of the subcarriers, and digital modulation is performed by phase shift keying (PSK) or quadrature amplitude modulation (QAM). This method uses a reduced band for one subcarrier since the transmission band is divided with respect to a number of subcarriers, so that the modulation speed is reduced. This method, however, achieves the same total transmission speed as other conventional modulation methods because the number of carriers is large.
In this OFDM method, the symbol speed is reduced since a number of subcarriers are transmitted parallel to each other, so that a multipath period relative to the length of a symbol with respect to time can be reduced. Thus, an OFDM method can be expected as a method ensuring high resistance to multipath interference.
Because of the above-described feature, OFDM methods have attracted attention particularly with respect to transmission of digital ground wave signals susceptible to the influence of multipath interference. For example, Digital Video Broadcasting-Terrestrial (DVB-T) is well known as such digital signal transmission by ground waves.
With the recent progress of the semiconductor technology, it has become possible to achieve discrete Fourier transform (hereinafter referred to as FFT (fast Fourier transform)) and discrete inverse Fourier transform (hereinafter referred to as IFFT (inverse fast Fourier transform)) by hardware. If these transforms are used, modulation and demodulation in accordance with an OFDM method can easily be performed. This has also contributed to the increase of attention to OFDM methods.
FIG. 10 is a block diagram showing the configuration of an example of an OFDM receiver. A receiving antenna 101 captures an RF signal. A multiplication circuit 102 calculates the product of the RF signal and a signal which is output from a tuner 103 and which has a predetermined frequency. A bandpass filter 104 extracts the desired IF signal from an output from the multiplication circuit 102. An A/D (analog to digital) conversion circuit 105 converts the IF signal extracted by the bandpass filter 104 into a digital signal.
A demultiplexer 106 separates and extracts an I channel signal and a Q channel signal from the digitized IF signal. Lowpass filters 107 and 108 respectively convert the I channel signal and the Q channel signal into baseband signals by removing unnecessary high-frequency components contained in the I channel signal and the Q channel signal.
A complex multiplication circuit 109 removes a carrier frequency error in the baseband signals by a signal of a predetermined frequency supplied from a numerical control oscillation circuit 110, and thereafter supplies the baseband signals to a fast Fourier transform circuit 112, which frequency-decomposes the OFDM time signals to form I and Q channel received data.
A correlation value calculation circuit 113 calculates a shift average of guard intervals by calculating the product of the OFDM time signal converted into the base band and the OFDM signal delayed by the effective symbol period to obtain a correlation value of the two signals, and makes the fast Fourier transform circuit 112 start calculating when the correlation value becomes maximized.
A carrier frequency error calculation circuit 114 calculates a carrier frequency error by detecting a frequency power deviation and outputs the calculation result to an addition circuit 111. The addition circuit 111 calculates the sum of the outputs from the carrier frequency error calculation circuit 114 and the correlation value calculation circuit 113 and outputs the calculation result to the numerical control oscillation circuit 110.
A clock frequency reproduction circuit 115 forms a control signal by referring to the I channel data and Q channel data to control the frequency of oscillation of the clock oscillation circuit 116. The clock oscillation circuit 116 forms and outputs a clock signal in accordance with the control signal supplied from the clock frequency reproduction circuit 115.
The operation of the above-described example of the conventional apparatus will next be described.
The multiplication circuit 102 calculates the product of an RF signal captured by the receiving antenna 101 and the signal supplied from the tuner 103 and having a predetermined frequency. The bandpass filter 104 extracts the IF signal from the signal output from the multiplication circuit 102.
The A/D conversion circuit 105 converts the IF signal output from the bandpass filter 104 into a digital signal in synchronization with the clock signal output from the clock oscillation circuit 116, and supplies the digital signal to the demultiplexer 106. The demultiplexer 106 separates and extracts an I channel signal and a Q channel signal from the digitized signal and supplies these signals to the lowpass filters 107 and 108. The lowpass filters 107 and 108 respectively convert the I channel signal and the Q channel signal into baseband signals by removing aliasing components which are unnecessary high-frequency components contained in the I channel signal and the Q channel signal.
The complex multiplication circuit 109 removes a carrier frequency error in the baseband signals by a signal of a predetermined frequency supplied from the numerical control oscillation circuit 110, and thereafter supplies the baseband signals to the fast Fourier transform circuit 112. The fast Fourier transform circuit 112 frequency-decomposes the OFDM time signal to form I and Q channel received data.
The correlation value calculation circuit 113 calculates a value representing a correlation between the OFDM time signal converted into the base band and the OFDM signal delayed by the effective symbol period and makes the fast Fourier transform circuit 112 start calculating when the correlation value becomes maximized. Consequently, the fast Fourier transform circuit 112 can accurately extract data contained in the I channel signal and Q channel signal sent from the transmitting side.
There are various synchronization requirements for correctly demodulating the OFDM signal on the receiving side. For example, it is necessary to synchronize the frequency of oscillation in the numerical control oscillation circuit 110 with the corresponding frequency on the transmitting side in order to convert the OFDM signal in the IF band into the OFDM signal in the base band. It is also necessary to synchronize the clock signal, which is a reference for all the processings, with that on the transmitting side.
A clock reproduction method already proposed, which is used as a method for the latter synchronization of the clock signal with that on the transmitting side, will now be described.
According to the method described below, on the transmitting side, a predetermined number of particular signals prescribed in amplitude and phase (hereinafter referred to as pilot signals other than information to be transmitted are inserted and transmitted with respect to each of symbols. On the receiving side, pilot signals inserted on the transmitting side are extracted from the OFDM signal processed by FFT calculation, and the extracted pilot signals are processed by Costas calculation or the like described below to reproduce the clock signal.
FIG. 11 shows the configuration of a conventional clock reproduction circuit for reproducing a clock signal by using Costas calculation in the case where pilot signals are modulated by QPSK (quadrature phase shift keying). Gate circuits 208-1 and 208-2 shown in FIG. 11 are supplied with I channel data and Q channel data processed by FFT calculation, extract only pilot signals from the I and Q channel data and output the pilot signals. Squaring circuits 203-1 and 203-2 respectively square the pilot signals extracted by the gate circuits 208-1 and 208-2 and output the squared signals. A multiplication circuit 205 calculates the product of the pilot signals extracted by the gate circuits 208-1 and 208-2 and outputs the product.
A subtraction circuit 206 subtracts the output of the squaring circuit 203-2 from the output of the squaring circuit 203-1 and outputs the subtraction result. A multiplication circuit 207 calculates the product of the output of the multiplication circuit 205 and the output of the subtraction circuit 206 and outputs the product. An LPF 209 removes unnecessary high-frequency components from the output of the multiplication circuit 207 and outputs the processing result.
The operation of the above-described conventional circuit will next be described.
I channel data and Q channel data demodulated by being frequency-decomposed by the fast Fourier transform circuit 112 shown in FIG. 10 are respectively input to the gate circuits 208-1 and 208-2 in the order from the lowest to the highest of their lower frequencies. The gate circuits 208-1 and 208-2 respectively extract only pilot signals from the I channel data and Q channel data and supply the extracted pilot signals to the squaring circuits 203-1 and 203-2 and to the multiplication circuit 205.
The multiplication circuit 205 calculates the product of the pilot signals extracted by the gate circuits 208-1 and 208-2 and outputs the product to the multiplication circuit 207. The squaring circuits 203-1 and 203-2 respectively square the pilot signals extracted by the gate circuits 208-1 and 208-2 and output the squared pilot signals to the subtraction circuit 206.
The subtraction circuit 206 subtracts the output of the squaring circuit 203-2 from the output of the squaring circuit 203-1 and outputs the subtraction result to the multiplication circuit 207. The multiplication circuit 207 calculates the product of the output of the multiplication circuit 205 and the output of the subtraction circuit 206 and outputs the product. The LPF 209 removes unnecessary high-frequency components from the output of the multiplication circuit 207 and outputs the processing result.
The above-described sequence of operations is so-called Costas calculation, whereby a phase error in the clock signal can be detected. The clock oscillation circuit 116 is controlled by referring to a phase error in the clock signal detected in the above-described manner, thereby forming the clock signal with accuracy.
In the case where a phase error is detected by using Costas calculation such as described above and a clock signal is reproduced according to the result of Costas calculation, the detected phase error contains, as well as a phase error accompanying a clock frequency error, a reproducing carrier phase error, an FFT window phase error, a phase error due to Gaussian noise, and a phase error due to a multipath transmission channel distortion unavoidable in transmission of ground waves. It is, therefore, difficult to control the clock oscillation circuit by extracting only a phase error accompanying only a reproducing clock error.
FIG. 12A shows an example of a spectrum of an OFDM signal, and FIG. 12B shows a spectrum of the OFDM signal when the signal is undergoing multipath interference. In these diagrams, thick lines represent pilot signals inserted on the transmitting side. If, as shown in FIG. 12B, a transmitted signal undergoes frequency-selective multipath interference, the signal-to-noise ratio of the pilot signals is reduced relative to that of the other subcarriers. In such a situation, the signal-to-noise ratio of the phase error signal of the clock signal formed from the pilot signals by the above-described method is also reduced. Thus, if the transmitted signal undergoes multipath interference, it is difficult to accurately reproduce the clock signal.